Technical Document
Specifications
Brand
NexperiaLogic Family
74LVT
Logic Function
D Type
Input Type
BiCMOS
Output Type
3 State
Output Signal Type
Single Ended
Triggering Type
Negative Edge, Positive Edge
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
48
Set/Reset
Reset
Number of Elements per Chip
16
Maximum Propagation Delay Time @ Maximum CL
5.6 ns @ 50 pF
Maximum Operating Supply Voltage
3.6 V
Dimensions
12.6 x 6.2 x 1.05mm
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+85 °C
Length
12.6mm
Height
1.05mm
Width
6.2mm
Minimum Operating Supply Voltage
2.7 V
Propagation Delay Test Condition
50pF
Product details
74LVT Family, Nexperia
Low-Voltage BiCMOS Technology Logic
Operating Voltage 2.7 to 3.6
Compatibility: Input LVTTL/TTL, Output LVTTL
74LVT Family
5.792 OMR
0.446 OMR Each (In a Pack of 13) (ex VAT)
6.082 OMR
0.468 OMR Each (In a Pack of 13) (inc. VAT)
Standard
13
5.792 OMR
0.446 OMR Each (In a Pack of 13) (ex VAT)
6.082 OMR
0.468 OMR Each (In a Pack of 13) (inc. VAT)
Standard
13
Stock information temporarily unavailable.
Please check again later.
quantity | Unit price | Per Pack |
---|---|---|
13 - 52 | 0.446 OMR | 5.792 OMR |
65 - 247 | 0.324 OMR | 4.218 OMR |
260 - 637 | 0.314 OMR | 4.076 OMR |
650+ | 0.308 OMR | 4.004 OMR |
Technical Document
Specifications
Brand
NexperiaLogic Family
74LVT
Logic Function
D Type
Input Type
BiCMOS
Output Type
3 State
Output Signal Type
Single Ended
Triggering Type
Negative Edge, Positive Edge
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
48
Set/Reset
Reset
Number of Elements per Chip
16
Maximum Propagation Delay Time @ Maximum CL
5.6 ns @ 50 pF
Maximum Operating Supply Voltage
3.6 V
Dimensions
12.6 x 6.2 x 1.05mm
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+85 °C
Length
12.6mm
Height
1.05mm
Width
6.2mm
Minimum Operating Supply Voltage
2.7 V
Propagation Delay Test Condition
50pF
Product details
74LVT Family, Nexperia
Low-Voltage BiCMOS Technology Logic
Operating Voltage 2.7 to 3.6
Compatibility: Input LVTTL/TTL, Output LVTTL