Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
Schmitt Trigger Buffer
Number of Channels
2
Schmitt Trigger Input
Yes
Input Type
Single Ended
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
SC-70
Pin Count
6
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Maximum Propagation Delay Time @ Maximum CL
5.4 ns @ 3.3 V
Dimensions
2 x 1.25 x 0.9mm
Maximum Operating Supply Voltage
5.5 V
Minimum Operating Temperature
-40 °C
Height
0.9mm
Propagation Delay Test Condition
50pF
Maximum Operating Temperature
+85 °C
Width
1.25mm
Minimum Operating Supply Voltage
1.65 V
Length
2mm
Product details
74LVC2G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family
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0.160 OMR
Each (Supplied on a Reel) (ex VAT)
0.168 OMR
Each (Supplied on a Reel) (inc. VAT)
Production pack (Reel)
10
0.160 OMR
Each (Supplied on a Reel) (ex VAT)
0.168 OMR
Each (Supplied on a Reel) (inc. VAT)
Production pack (Reel)
10
Buy in bulk
quantity | Unit price | Per Reel |
---|---|---|
10 - 40 | 0.160 OMR | 1.600 OMR |
50 - 90 | 0.140 OMR | 1.400 OMR |
100 - 190 | 0.120 OMR | 1.200 OMR |
200 - 390 | 0.110 OMR | 1.100 OMR |
400+ | 0.100 OMR | 1.000 OMR |
Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
Schmitt Trigger Buffer
Number of Channels
2
Schmitt Trigger Input
Yes
Input Type
Single Ended
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
SC-70
Pin Count
6
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Maximum Propagation Delay Time @ Maximum CL
5.4 ns @ 3.3 V
Dimensions
2 x 1.25 x 0.9mm
Maximum Operating Supply Voltage
5.5 V
Minimum Operating Temperature
-40 °C
Height
0.9mm
Propagation Delay Test Condition
50pF
Maximum Operating Temperature
+85 °C
Width
1.25mm
Minimum Operating Supply Voltage
1.65 V
Length
2mm
Product details
74LVC2G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS