Texas Instruments SN74LVC1G08DCKT 2-Input AND Logic Gate, 5-Pin SC-70
Technical Document
Specifications
Brand
Texas InstrumentsLogic Function
AND
Mounting Type
Surface Mount
Number Of Elements
1
Number of Inputs per Gate
2
Schmitt Trigger Input
No
Package Type
SC-70
Pin Count
5
Logic Family
LVC
Maximum Operating Supply Voltage
5.5 V
Maximum High Level Output Current
-32mA
Maximum Propagation Delay Time @ Maximum CL
4 ns @ 5 V, 4.5 ns @ 3.3 V
Minimum Operating Supply Voltage
1.65 V
Maximum Low Level Output Current
32mA
Maximum Operating Temperature
+85 °C
Length
2mm
Width
1.25mm
Minimum Operating Temperature
-40 °C
Height
0.9mm
Dimensions
2 x 1.25 x 0.9mm
Propagation Delay Test Condition
50pF
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
74LVC Family
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1.760 OMR
0.352 OMR Each (In a Pack of 5) (ex VAT)
1.848 OMR
0.370 OMR Each (In a Pack of 5) (inc. VAT)
Standard
5
1.760 OMR
0.352 OMR Each (In a Pack of 5) (ex VAT)
1.848 OMR
0.370 OMR Each (In a Pack of 5) (inc. VAT)
Standard
5
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Please check again later.
| quantity | Unit price | Per Pack |
|---|---|---|
| 5 - 20 | 0.352 OMR | 1.760 OMR |
| 25 - 45 | 0.286 OMR | 1.430 OMR |
| 50 - 95 | 0.264 OMR | 1.320 OMR |
| 100 - 245 | 0.248 OMR | 1.238 OMR |
| 250+ | 0.231 OMR | 1.155 OMR |
Ideate. Create. Collaborate
JOIN FOR FREE
No hidden fees!
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Technical Document
Specifications
Brand
Texas InstrumentsLogic Function
AND
Mounting Type
Surface Mount
Number Of Elements
1
Number of Inputs per Gate
2
Schmitt Trigger Input
No
Package Type
SC-70
Pin Count
5
Logic Family
LVC
Maximum Operating Supply Voltage
5.5 V
Maximum High Level Output Current
-32mA
Maximum Propagation Delay Time @ Maximum CL
4 ns @ 5 V, 4.5 ns @ 3.3 V
Minimum Operating Supply Voltage
1.65 V
Maximum Low Level Output Current
32mA
Maximum Operating Temperature
+85 °C
Length
2mm
Width
1.25mm
Minimum Operating Temperature
-40 °C
Height
0.9mm
Dimensions
2 x 1.25 x 0.9mm
Propagation Delay Test Condition
50pF
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
74LVC Family
Ideate. Create. Collaborate
JOIN FOR FREE
No hidden fees!
- Download and use our DesignSpark software for your PCB and 3D Mechanical designs
- View and contribute website content and forums
- Download 3D Models, Schematics and Footprints from more than a million products