Technical Document
Specifications
Brand
Texas InstrumentsLogic Function
NAND
Mounting Type
Surface Mount
Number Of Elements
1
Number of Inputs per Gate
2
Schmitt Trigger Input
No
Package Type
SOT-23
Pin Count
5
Logic Family
LVC
Maximum Operating Supply Voltage
5.5 V
Maximum High Level Output Current
-32mA
Maximum Propagation Delay Time @ Maximum CL
4 ns @ 5 V, 4.7 ns @ 3.3 V
Minimum Operating Supply Voltage
1.65 V
Maximum Low Level Output Current
32mA
Maximum Operating Temperature
+85 °C
Propagation Delay Test Condition
50pF
Length
2.9mm
Height
1.15mm
Width
1.6mm
Minimum Operating Temperature
-40 °C
Dimensions
2.9 x 1.6 x 1.15mm
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
74LVC Family
53.625 OMR
0.214 OMR Each (On a Reel of 250) (ex VAT)
56.306 OMR
0.225 OMR Each (On a Reel of 250) (inc. VAT)
250
53.625 OMR
0.214 OMR Each (On a Reel of 250) (ex VAT)
56.306 OMR
0.225 OMR Each (On a Reel of 250) (inc. VAT)
250
Stock information temporarily unavailable.
Please check again later.
quantity | Unit price | Per Reel |
---|---|---|
250 - 1000 | 0.214 OMR | 53.625 OMR |
1250 - 2250 | 0.182 OMR | 45.375 OMR |
2500+ | 0.176 OMR | 44.000 OMR |
Technical Document
Specifications
Brand
Texas InstrumentsLogic Function
NAND
Mounting Type
Surface Mount
Number Of Elements
1
Number of Inputs per Gate
2
Schmitt Trigger Input
No
Package Type
SOT-23
Pin Count
5
Logic Family
LVC
Maximum Operating Supply Voltage
5.5 V
Maximum High Level Output Current
-32mA
Maximum Propagation Delay Time @ Maximum CL
4 ns @ 5 V, 4.7 ns @ 3.3 V
Minimum Operating Supply Voltage
1.65 V
Maximum Low Level Output Current
32mA
Maximum Operating Temperature
+85 °C
Propagation Delay Test Condition
50pF
Length
2.9mm
Height
1.15mm
Width
1.6mm
Minimum Operating Temperature
-40 °C
Dimensions
2.9 x 1.6 x 1.15mm
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22