Nexperia 74LVC2G32DP,125, Dual 2-Input OR Logic Gate, 8-Pin TSSOP
Technical Document
Specifications
Brand
NexperiaLogic Function
OR
Mounting Type
Surface Mount
Number Of Elements
2
Number of Inputs per Gate
2
Schmitt Trigger Input
No
Package Type
TSSOP
Pin Count
8
Logic Family
LVC
Input Type
TTL
Maximum Operating Supply Voltage
5.5 V
Maximum High Level Output Current
-32mA
Maximum Propagation Delay Time @ Maximum CL
6 ns @ 50 pF
Minimum Operating Supply Voltage
1.65 V
Maximum Low Level Output Current
32mA
Minimum Operating Temperature
-40 °C
Output Type
Single Ended
Length
3.1mm
Height
0.95mm
Width
3.1mm
Dimensions
3.1 x 3.1 x 0.95mm
Propagation Delay Test Condition
50pF
Maximum Operating Temperature
+125 °C
Product details
74LVC Family Logic Gates
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family
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3.630 OMR
0.121 OMR Each (In a Pack of 30) (ex VAT)
3.812 OMR
0.127 OMR Each (In a Pack of 30) (inc. VAT)
Standard
30
3.630 OMR
0.121 OMR Each (In a Pack of 30) (ex VAT)
3.812 OMR
0.127 OMR Each (In a Pack of 30) (inc. VAT)
Stock information temporarily unavailable.
Standard
30
Stock information temporarily unavailable.
| Quantity | Unit price | Per Pack |
|---|---|---|
| 30 - 120 | 0.121 OMR | 3.630 OMR |
| 150 - 270 | 0.116 OMR | 3.465 OMR |
| 300 - 720 | 0.104 OMR | 3.135 OMR |
| 750 - 1470 | 0.099 OMR | 2.970 OMR |
| 1500+ | 0.094 OMR | 2.805 OMR |
Ideate. Create. Collaborate
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No hidden fees!
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Technical Document
Specifications
Brand
NexperiaLogic Function
OR
Mounting Type
Surface Mount
Number Of Elements
2
Number of Inputs per Gate
2
Schmitt Trigger Input
No
Package Type
TSSOP
Pin Count
8
Logic Family
LVC
Input Type
TTL
Maximum Operating Supply Voltage
5.5 V
Maximum High Level Output Current
-32mA
Maximum Propagation Delay Time @ Maximum CL
6 ns @ 50 pF
Minimum Operating Supply Voltage
1.65 V
Maximum Low Level Output Current
32mA
Minimum Operating Temperature
-40 °C
Output Type
Single Ended
Length
3.1mm
Height
0.95mm
Width
3.1mm
Dimensions
3.1 x 3.1 x 0.95mm
Propagation Delay Test Condition
50pF
Maximum Operating Temperature
+125 °C
Product details
74LVC Family Logic Gates
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family
Ideate. Create. Collaborate
JOIN FOR FREE
No hidden fees!
- Download and use our DesignSpark software for your PCB and 3D Mechanical designs
- View and contribute website content and forums
- Download 3D Models, Schematics and Footprints from more than a million products