Technical Document
Specifications
Brand
NexperiaProduct Type
Logic Gate
Logic Function
AND
Mount Type
Surface
Number of Elements
4
Number of Inputs per Gate
2
Schmitt Trigger Input
No
Package Type
SOIC
Pin Count
14
Logic Family
LV
Input Type
CMOS
Maximum Propagation Delay Time @ CL
14ns
Minimum Operating Temperature
-40°C
Maximum High Level Output Current
-12mA
Maximum Operating Temperature
125°C
Minimum Supply Voltage
1V
Width
4 mm
Series
74LV
Maximum Supply Voltage
5.5V
Height
1.45mm
Length
8.75mm
Standards/Approvals
No
Maximum Low Level Output Current
12mA
Automotive Standard
No
Output Type
Current/Voltage
Product details
74LV Family, Nexperia
Low-Voltage CMOS logic
Operating Voltage: 1.0 to 5.5
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LV Family
Stock information temporarily unavailable.
8.155 OMR
0.215 OMR Each (In a Pack of 38) (ex VAT)
8.563 OMR
0.226 OMR Each (In a Pack of 38) (inc. VAT)
Standard
38
8.155 OMR
0.215 OMR Each (In a Pack of 38) (ex VAT)
8.563 OMR
0.226 OMR Each (In a Pack of 38) (inc. VAT)
Stock information temporarily unavailable.
Standard
38
| Quantity | Unit price | Per Pack |
|---|---|---|
| 38 - 38 | 0.215 OMR | 8.155 OMR |
| 76 - 152 | 0.203 OMR | 7.714 OMR |
| 190 - 342 | 0.174 OMR | 6.612 OMR |
| 380 - 722 | 0.151 OMR | 5.730 OMR |
| 760+ | 0.151 OMR | 5.730 OMR |
Technical Document
Specifications
Brand
NexperiaProduct Type
Logic Gate
Logic Function
AND
Mount Type
Surface
Number of Elements
4
Number of Inputs per Gate
2
Schmitt Trigger Input
No
Package Type
SOIC
Pin Count
14
Logic Family
LV
Input Type
CMOS
Maximum Propagation Delay Time @ CL
14ns
Minimum Operating Temperature
-40°C
Maximum High Level Output Current
-12mA
Maximum Operating Temperature
125°C
Minimum Supply Voltage
1V
Width
4 mm
Series
74LV
Maximum Supply Voltage
5.5V
Height
1.45mm
Length
8.75mm
Standards/Approvals
No
Maximum Low Level Output Current
12mA
Automotive Standard
No
Output Type
Current/Voltage
Product details
74LV Family, Nexperia
Low-Voltage CMOS logic
Operating Voltage: 1.0 to 5.5
Compatibility: Input LVTTL/TTL, Output LVCMOS


