Technical Document
Specifications
Brand
NexperiaLogic Function
Inverter
Input Type
Schmitt Trigger
Number of Elements per Chip
2
Schmitt Trigger Input
Yes
Maximum Propagation Delay Time @ Maximum CL
12 ns @ 50 pF
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Mounting Type
Surface Mount
Package Type
SC-88
Pin Count
6
Logic Family
LVC
Dimensions
2.2 x 1.35 x 1mm
Maximum Operating Supply Voltage
5.5 V
Height
1mm
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+125 °C
Length
2.2mm
Width
1.35mm
Minimum Operating Supply Voltage
1.65 V
Propagation Delay Test Condition
50pF
Product details
74LVC Family Inverters & Buffers
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family
Stock information temporarily unavailable.
Please check again later.
0.115 OMR
Each (Supplied on a Reel) (ex VAT)
0.121 OMR
Each (Supplied on a Reel) (inc VAT)
40
0.115 OMR
Each (Supplied on a Reel) (ex VAT)
0.121 OMR
Each (Supplied on a Reel) (inc VAT)
40
Buy in bulk
quantity | Unit price | Per Reel |
---|---|---|
40 - 40 | 0.115 OMR | 4.600 OMR |
80 - 160 | 0.090 OMR | 3.600 OMR |
200 - 360 | 0.070 OMR | 2.800 OMR |
400 - 760 | 0.060 OMR | 2.400 OMR |
800+ | 0.055 OMR | 2.200 OMR |
Technical Document
Specifications
Brand
NexperiaLogic Function
Inverter
Input Type
Schmitt Trigger
Number of Elements per Chip
2
Schmitt Trigger Input
Yes
Maximum Propagation Delay Time @ Maximum CL
12 ns @ 50 pF
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Mounting Type
Surface Mount
Package Type
SC-88
Pin Count
6
Logic Family
LVC
Dimensions
2.2 x 1.35 x 1mm
Maximum Operating Supply Voltage
5.5 V
Height
1mm
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+125 °C
Length
2.2mm
Width
1.35mm
Minimum Operating Supply Voltage
1.65 V
Propagation Delay Test Condition
50pF
Product details
74LVC Family Inverters & Buffers
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS