Technical Document
Specifications
Product Type
Function Generator IC
Mount Type
Surface
Package Type
QFN
Minimum Supply Voltage
1.71V
Pin Count
24
Maximum Supply Voltage
3.63V
Minimum Operating Temperature
-40°C
Maximum Operating Temperature
85°C
Standards/Approvals
No
Series
Si5338A
Length
4mm
Height
0.85mm
Automotive Standard
No
Maximum Output Frequency
710MHz
Product details
Si5334/35/38 Clock Generators, Silicon Labs
The Silicon Labs Si5334/35/38 are differential and LVCMOS clock generators which provide any rate, any output frequency synthesis. They enable a single device to replace multiple crystal oscillators and fixed-frequency clock generators.
Any combination of output frequencies can be generated with exactly 0 ppm error. Independent signal format and VDDO options provide integrated level translation, supporting LVPECL/LVDS/HCSL/LVCMOS clock generation up to 712.5 MHz with sub 1 ps RMS phase jitter.
Stock information temporarily unavailable.
11.888 OMR
11.888 OMR Each (ex VAT)
12.482 OMR
12.482 OMR Each (inc. VAT)
Standard
1
11.888 OMR
11.888 OMR Each (ex VAT)
12.482 OMR
12.482 OMR Each (inc. VAT)
Stock information temporarily unavailable.
Standard
1
| Quantity | Unit price |
|---|---|
| 1 - 1 | 11.888 OMR |
| 2 - 4 | 11.607 OMR |
| 5+ | 11.254 OMR |
Technical Document
Specifications
Product Type
Function Generator IC
Mount Type
Surface
Package Type
QFN
Minimum Supply Voltage
1.71V
Pin Count
24
Maximum Supply Voltage
3.63V
Minimum Operating Temperature
-40°C
Maximum Operating Temperature
85°C
Standards/Approvals
No
Series
Si5338A
Length
4mm
Height
0.85mm
Automotive Standard
No
Maximum Output Frequency
710MHz
Product details
Si5334/35/38 Clock Generators, Silicon Labs
The Silicon Labs Si5334/35/38 are differential and LVCMOS clock generators which provide any rate, any output frequency synthesis. They enable a single device to replace multiple crystal oscillators and fixed-frequency clock generators.
Any combination of output frequencies can be generated with exactly 0 ppm error. Independent signal format and VDDO options provide integrated level translation, supporting LVPECL/LVDS/HCSL/LVCMOS clock generation up to 712.5 MHz with sub 1 ps RMS phase jitter.


