Texas Instruments 74LVC1GU04DCKR CMOS Inverter, 5-Pin SC-70
Technical Document
Specifications
Brand
Texas InstrumentsLogic Function
Inverter
Number of Elements per Chip
1
Schmitt Trigger Input
No
Maximum Propagation Delay Time @ Maximum CL
3.7 ns @ 3.3 V
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Mounting Type
Surface Mount
Package Type
SC-70
Pin Count
5
Logic Family
LVC
Dimensions
2 x 1.25 x 0.9mm
Maximum Operating Supply Voltage
5.5 V
Height
0.9mm
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+85 °C
Length
2mm
Width
1.25mm
Minimum Operating Supply Voltage
1.65 V
Propagation Delay Test Condition
50pF
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
74LVC Family
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0.100 OMR
Each (Supplied on a Reel) (ex VAT)
0.105 OMR
Each (Supplied on a Reel) (inc VAT)
10
0.100 OMR
Each (Supplied on a Reel) (ex VAT)
0.105 OMR
Each (Supplied on a Reel) (inc VAT)
10
Buy in bulk
| quantity | Unit price | Per Reel |
|---|---|---|
| 10 - 240 | 0.100 OMR | 1.000 OMR |
| 250 - 990 | 0.095 OMR | 0.950 OMR |
| 1000 - 2490 | 0.080 OMR | 0.800 OMR |
| 2500 - 4990 | 0.075 OMR | 0.750 OMR |
| 5000+ | 0.070 OMR | 0.700 OMR |
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Technical Document
Specifications
Brand
Texas InstrumentsLogic Function
Inverter
Number of Elements per Chip
1
Schmitt Trigger Input
No
Maximum Propagation Delay Time @ Maximum CL
3.7 ns @ 3.3 V
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Mounting Type
Surface Mount
Package Type
SC-70
Pin Count
5
Logic Family
LVC
Dimensions
2 x 1.25 x 0.9mm
Maximum Operating Supply Voltage
5.5 V
Height
0.9mm
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+85 °C
Length
2mm
Width
1.25mm
Minimum Operating Supply Voltage
1.65 V
Propagation Delay Test Condition
50pF
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
74LVC Family
Ideate. Create. Collaborate
JOIN FOR FREE
No hidden fees!
- Download and use our DesignSpark software for your PCB and 3D Mechanical designs
- View and contribute website content and forums
- Download 3D Models, Schematics and Footprints from more than a million products