Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
ALVC
Logic Function
Bus Transceiver
Number of Elements per Chip
2
Number of Channels per Chip
16
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
SSOP
Pin Count
48
Input Level
LVTTL
Output Level
LVTTL
Maximum High Level Output Current
-24mA
Maximum Low Level Output Current
24mA
Maximum Propagation Delay Time @ Maximum CL
5.8 ns@ 5 V
Height
2.59mm
Dimensions
15.88 x 7.49 x 2.59mm
Propagation Delay Test Condition
50pF
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+85 °C
Length
15.88mm
Maximum Operating Supply Voltage
3.6 V, 5.5 V
Width
7.49mm
Minimum Operating Supply Voltage
2.3 V, 3 V
Product details
74ALVC Family, Texas Instruments
Advanced Low-Voltage CMOS logic
Operating voltage: 1.65 to 3.6
Compatibility: Input CMOS, Output CMOS
Latch-up performance exceeds 250 mA per JESD 17
74ALVC Family
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1.785 OMR
Each (In a Pack of 5) (ex VAT)
1.874 OMR
Each (In a Pack of 5) (inc VAT)
5
1.785 OMR
Each (In a Pack of 5) (ex VAT)
1.874 OMR
Each (In a Pack of 5) (inc VAT)
5
Buy in bulk
quantity | Unit price | Per Pack |
---|---|---|
5 - 20 | 1.785 OMR | 8.925 OMR |
25 - 45 | 1.695 OMR | 8.475 OMR |
50 - 120 | 1.525 OMR | 7.625 OMR |
125 - 245 | 1.375 OMR | 6.875 OMR |
250+ | 1.310 OMR | 6.550 OMR |
Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
ALVC
Logic Function
Bus Transceiver
Number of Elements per Chip
2
Number of Channels per Chip
16
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
SSOP
Pin Count
48
Input Level
LVTTL
Output Level
LVTTL
Maximum High Level Output Current
-24mA
Maximum Low Level Output Current
24mA
Maximum Propagation Delay Time @ Maximum CL
5.8 ns@ 5 V
Height
2.59mm
Dimensions
15.88 x 7.49 x 2.59mm
Propagation Delay Test Condition
50pF
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+85 °C
Length
15.88mm
Maximum Operating Supply Voltage
3.6 V, 5.5 V
Width
7.49mm
Minimum Operating Supply Voltage
2.3 V, 3 V
Product details
74ALVC Family, Texas Instruments
Advanced Low-Voltage CMOS logic
Operating voltage: 1.65 to 3.6
Compatibility: Input CMOS, Output CMOS
Latch-up performance exceeds 250 mA per JESD 17