Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
ALVC
Logic Function
Bus Transceiver
Number of Elements per Chip
1
Number of Channels per Chip
8
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
20
Input Level
LVTTL
Output Level
LVTTL
Maximum High Level Output Current
-24mA
Maximum Low Level Output Current
24mA
Maximum Propagation Delay Time @ Maximum CL
3.6 ns @ 2.7 V
Height
1.15mm
Width
4.4mm
Minimum Operating Temperature
-40 °C
Dimensions
6.5 x 4.4 x 1.15mm
Minimum Operating Supply Voltage
1.65 V
Maximum Operating Temperature
+85 °C
Propagation Delay Test Condition
50pF
Length
6.5mm
Maximum Operating Supply Voltage
3.6 V
Country of Origin
Malaysia
Product details
74ALVC Family, Texas Instruments
Advanced Low-Voltage CMOS logic
Operating voltage: 1.65 to 3.6
Compatibility: Input CMOS, Output CMOS
Latch-up performance exceeds 250 mA per JESD 17
74ALVC Family
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0.160 OMR
Each (On a Reel of 2000) (ex VAT)
0.168 OMR
Each (On a Reel of 2000) (inc VAT)
2000
0.160 OMR
Each (On a Reel of 2000) (ex VAT)
0.168 OMR
Each (On a Reel of 2000) (inc VAT)
2000
Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
ALVC
Logic Function
Bus Transceiver
Number of Elements per Chip
1
Number of Channels per Chip
8
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
20
Input Level
LVTTL
Output Level
LVTTL
Maximum High Level Output Current
-24mA
Maximum Low Level Output Current
24mA
Maximum Propagation Delay Time @ Maximum CL
3.6 ns @ 2.7 V
Height
1.15mm
Width
4.4mm
Minimum Operating Temperature
-40 °C
Dimensions
6.5 x 4.4 x 1.15mm
Minimum Operating Supply Voltage
1.65 V
Maximum Operating Temperature
+85 °C
Propagation Delay Test Condition
50pF
Length
6.5mm
Maximum Operating Supply Voltage
3.6 V
Country of Origin
Malaysia
Product details
74ALVC Family, Texas Instruments
Advanced Low-Voltage CMOS logic
Operating voltage: 1.65 to 3.6
Compatibility: Input CMOS, Output CMOS
Latch-up performance exceeds 250 mA per JESD 17