Technical Document
Specifications
Brand
Texas InstrumentsLogic Function
Inverting Buffer
Output Type
Open Drain
Number of Elements per Chip
6
Schmitt Trigger Input
No
Maximum Propagation Delay Time @ Maximum CL
10.6 ns @ 3.3 V, 15.2 ns @ 2.5 V, 7.5 ns @ 5 V
Maximum High Level Output Current
-0.002mA
Maximum Low Level Output Current
16mA
Mounting Type
Surface Mount
Package Type
SOIC
Pin Count
14
Logic Family
LV
Dimensions
8.65 x 3.91 x 1.58mm
Height
1.58mm
Maximum Operating Supply Voltage
5.5 V
Minimum Operating Temperature
-40 °C
Propagation Delay Test Condition
50pF
Maximum Operating Temperature
+85 °C
Length
8.65mm
Width
3.91mm
Minimum Operating Supply Voltage
2 V
Product details
74LV Family, Texas Instruments
Low-Voltage CMOS logic
Operating Voltage: 2 to 5.5
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LV Family
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0.165 OMR
Each (Supplied in a Tube) (ex VAT)
0.173 OMR
Each (Supplied in a Tube) (inc VAT)
10
0.165 OMR
Each (Supplied in a Tube) (ex VAT)
0.173 OMR
Each (Supplied in a Tube) (inc VAT)
10
Buy in bulk
quantity | Unit price | Per Tube |
---|---|---|
10 - 40 | 0.165 OMR | 1.650 OMR |
50 - 90 | 0.155 OMR | 1.550 OMR |
100 - 240 | 0.140 OMR | 1.400 OMR |
250 - 490 | 0.125 OMR | 1.250 OMR |
500+ | 0.120 OMR | 1.200 OMR |
Technical Document
Specifications
Brand
Texas InstrumentsLogic Function
Inverting Buffer
Output Type
Open Drain
Number of Elements per Chip
6
Schmitt Trigger Input
No
Maximum Propagation Delay Time @ Maximum CL
10.6 ns @ 3.3 V, 15.2 ns @ 2.5 V, 7.5 ns @ 5 V
Maximum High Level Output Current
-0.002mA
Maximum Low Level Output Current
16mA
Mounting Type
Surface Mount
Package Type
SOIC
Pin Count
14
Logic Family
LV
Dimensions
8.65 x 3.91 x 1.58mm
Height
1.58mm
Maximum Operating Supply Voltage
5.5 V
Minimum Operating Temperature
-40 °C
Propagation Delay Test Condition
50pF
Maximum Operating Temperature
+85 °C
Length
8.65mm
Width
3.91mm
Minimum Operating Supply Voltage
2 V
Product details
74LV Family, Texas Instruments
Low-Voltage CMOS logic
Operating Voltage: 2 to 5.5
Compatibility: Input LVTTL/TTL, Output LVCMOS