Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVC
IC Type
Buffer & Line Driver IC
Mounting Type
Surface Mount
Package Type
SOIC
Pin Count
14
Maximum High Level Output Current
-24mA
Maximum Low Level Output Current
24mA
Maximum Propagation Delay Time @ Maximum CL
5.3 ns @ 2.7 V
Dimensions
8.65 x 3.91 x 1.58mm
Minimum Operating Supply Voltage
1.65 V
Maximum Operating Supply Voltage
3.6 V
Propagation Delay Test Condition
50pF
Product details
74LVC Family Inverters & Buffers, Texas Instruments
Texas Instruments range of Inverters and Buffers from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating Voltage: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22
74LVC Family
Stock information temporarily unavailable.
Please check again later.
0.080 OMR
Each (On a Reel of 2500) (ex VAT)
0.084 OMR
Each (On a Reel of 2500) (inc VAT)
2500
0.080 OMR
Each (On a Reel of 2500) (ex VAT)
0.084 OMR
Each (On a Reel of 2500) (inc VAT)
2500
Buy in bulk
quantity | Unit price | Per Reel |
---|---|---|
2500 - 2500 | 0.080 OMR | 200.000 OMR |
5000 - 5000 | 0.075 OMR | 187.500 OMR |
7500+ | 0.070 OMR | 175.000 OMR |
Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVC
IC Type
Buffer & Line Driver IC
Mounting Type
Surface Mount
Package Type
SOIC
Pin Count
14
Maximum High Level Output Current
-24mA
Maximum Low Level Output Current
24mA
Maximum Propagation Delay Time @ Maximum CL
5.3 ns @ 2.7 V
Dimensions
8.65 x 3.91 x 1.58mm
Minimum Operating Supply Voltage
1.65 V
Maximum Operating Supply Voltage
3.6 V
Propagation Delay Test Condition
50pF
Product details
74LVC Family Inverters & Buffers, Texas Instruments
Texas Instruments range of Inverters and Buffers from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating Voltage: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22