Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
Buffer, Driver
IC Type
Buffer & Line Driver IC
Number of Channels per Chip
1
Input Type
Single Ended
Output Type
3 State
Polarity
Inverting
Mounting Type
Surface Mount
Package Type
SOT-23
Pin Count
5
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Maximum Propagation Delay Time @ Maximum CL
9.6 ns@ 50 pF
Dimensions
3.05 x 1.75 x 1.3mm
Maximum Operating Supply Voltage
5.5 V
Minimum Operating Supply Voltage
1.65 V
Propagation Delay Test Condition
50pF
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
74LVC Family
Stock information temporarily unavailable.
1.760 OMR
0.088 OMR Each (In a Pack of 20) (ex VAT)
1.848 OMR
0.092 OMR Each (In a Pack of 20) (inc. VAT)
Standard
20
1.760 OMR
0.088 OMR Each (In a Pack of 20) (ex VAT)
1.848 OMR
0.092 OMR Each (In a Pack of 20) (inc. VAT)
Stock information temporarily unavailable.
Standard
20
| Quantity | Unit price | Per Pack |
|---|---|---|
| 20 - 80 | 0.088 OMR | 1.760 OMR |
| 100 - 180 | 0.082 OMR | 1.650 OMR |
| 200 - 480 | 0.072 OMR | 1.430 OMR |
| 500 - 980 | 0.066 OMR | 1.320 OMR |
| 1000+ | 0.060 OMR | 1.210 OMR |
Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
Buffer, Driver
IC Type
Buffer & Line Driver IC
Number of Channels per Chip
1
Input Type
Single Ended
Output Type
3 State
Polarity
Inverting
Mounting Type
Surface Mount
Package Type
SOT-23
Pin Count
5
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Maximum Propagation Delay Time @ Maximum CL
9.6 ns@ 50 pF
Dimensions
3.05 x 1.75 x 1.3mm
Maximum Operating Supply Voltage
5.5 V
Minimum Operating Supply Voltage
1.65 V
Propagation Delay Test Condition
50pF
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
