Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Mounting Type
Surface Mount
Package Type
US
Pin Count
8
Maximum Propagation Delay Time @ Maximum CL
4.2 ns@ 5 V
Maximum Operating Supply Voltage
5.5 V
Dimensions
2.1 x 2.4 x 0.8mm
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+125 °C
Length
2.15mm
Height
0.8mm
Width
2.4mm
Minimum Operating Supply Voltage
1.65 V
Propagation Delay Test Condition
50pF
Product details
74LVC Family Inverters & Buffers, Texas Instruments
Texas Instruments range of Inverters and Buffers from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating Voltage: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22
74LVC Family
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0.165 OMR
Each (In a Pack of 10) (ex VAT)
0.173 OMR
Each (In a Pack of 10) (inc. VAT)
Standard
10
0.165 OMR
Each (In a Pack of 10) (ex VAT)
0.173 OMR
Each (In a Pack of 10) (inc. VAT)
Standard
10
Buy in bulk
quantity | Unit price | Per Pack |
---|---|---|
10 - 40 | 0.165 OMR | 1.650 OMR |
50 - 90 | 0.160 OMR | 1.600 OMR |
100 - 240 | 0.140 OMR | 1.400 OMR |
250 - 490 | 0.130 OMR | 1.300 OMR |
500+ | 0.125 OMR | 1.250 OMR |
Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Mounting Type
Surface Mount
Package Type
US
Pin Count
8
Maximum Propagation Delay Time @ Maximum CL
4.2 ns@ 5 V
Maximum Operating Supply Voltage
5.5 V
Dimensions
2.1 x 2.4 x 0.8mm
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+125 °C
Length
2.15mm
Height
0.8mm
Width
2.4mm
Minimum Operating Supply Voltage
1.65 V
Propagation Delay Test Condition
50pF
Product details
74LVC Family Inverters & Buffers, Texas Instruments
Texas Instruments range of Inverters and Buffers from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating Voltage: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22