Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVT
Logic Function
Bus Transceiver
Number of Elements per Chip
1
Number of Channels per Chip
8
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
20
Input Level
LVTTL
Output Level
LVTTL
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
64mA
Maximum Propagation Delay Time @ Maximum CL
2.3 ns @ 3.3 V
Maximum Operating Temperature
+85 °C
Length
6.5mm
Maximum Operating Supply Voltage
3.6 V
Width
4.4mm
Minimum Operating Supply Voltage
2.7 V
Minimum Operating Temperature
-40 °C
Height
1.15mm
Dimensions
6.5 x 4.4 x 1.15mm
Propagation Delay Test Condition
50pF
Product details
74LVT Family, Texas Instruments
Low-Voltage BiCMOS logic
Operating Voltage: 2.7 to 3.6
Compatibility: Input LVTTL/TTL, Output LVTTL
74LVT Family
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0.270 OMR
Each (Supplied in a Tube) (ex VAT)
0.284 OMR
Each (Supplied in a Tube) (inc VAT)
5
0.270 OMR
Each (Supplied in a Tube) (ex VAT)
0.284 OMR
Each (Supplied in a Tube) (inc VAT)
5
Buy in bulk
quantity | Unit price | Per Tube |
---|---|---|
5 - 20 | 0.270 OMR | 1.350 OMR |
25 - 45 | 0.255 OMR | 1.275 OMR |
50 - 120 | 0.235 OMR | 1.175 OMR |
125 - 245 | 0.215 OMR | 1.075 OMR |
250+ | 0.210 OMR | 1.050 OMR |
Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVT
Logic Function
Bus Transceiver
Number of Elements per Chip
1
Number of Channels per Chip
8
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
20
Input Level
LVTTL
Output Level
LVTTL
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
64mA
Maximum Propagation Delay Time @ Maximum CL
2.3 ns @ 3.3 V
Maximum Operating Temperature
+85 °C
Length
6.5mm
Maximum Operating Supply Voltage
3.6 V
Width
4.4mm
Minimum Operating Supply Voltage
2.7 V
Minimum Operating Temperature
-40 °C
Height
1.15mm
Dimensions
6.5 x 4.4 x 1.15mm
Propagation Delay Test Condition
50pF
Product details
74LVT Family, Texas Instruments
Low-Voltage BiCMOS logic
Operating Voltage: 2.7 to 3.6
Compatibility: Input LVTTL/TTL, Output LVTTL