Technical Document
Specifications
Brand
NexperiaLogic Function
NAND
Mounting Type
Surface Mount
Number Of Elements
4
Number of Inputs per Gate
2
Schmitt Trigger Input
No
Package Type
TSSOP
Pin Count
14
Logic Family
LVC
Maximum Operating Supply Voltage
3.6 V
Maximum High Level Output Current
-24mA
Minimum Operating Supply Voltage
1.2 V
Maximum Low Level Output Current
24mA
Maximum Operating Temperature
+125 °C
Propagation Delay Test Condition
50pF
Length
5.1mm
Height
0.95mm
Width
4.5mm
Minimum Operating Temperature
-40 °C
Dimensions
5.1 x 4.5 x 0.95mm
Country of Origin
Thailand
Product details
74LVC Family Logic Gates
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family
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0.135 OMR
Each (In a Tube of 96) (ex VAT)
0.142 OMR
Each (In a Tube of 96) (inc VAT)
96
0.135 OMR
Each (In a Tube of 96) (ex VAT)
0.142 OMR
Each (In a Tube of 96) (inc VAT)
96
Technical Document
Specifications
Brand
NexperiaLogic Function
NAND
Mounting Type
Surface Mount
Number Of Elements
4
Number of Inputs per Gate
2
Schmitt Trigger Input
No
Package Type
TSSOP
Pin Count
14
Logic Family
LVC
Maximum Operating Supply Voltage
3.6 V
Maximum High Level Output Current
-24mA
Minimum Operating Supply Voltage
1.2 V
Maximum Low Level Output Current
24mA
Maximum Operating Temperature
+125 °C
Propagation Delay Test Condition
50pF
Length
5.1mm
Height
0.95mm
Width
4.5mm
Minimum Operating Temperature
-40 °C
Dimensions
5.1 x 4.5 x 0.95mm
Country of Origin
Thailand
Product details
74LVC Family Logic Gates
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS