Nexperia 74LVC1G32GV,125 2-Input OR Logic Gate, 5-Pin SC-74A
Technical Document
Specifications
Brand
NexperiaLogic Function
OR
Mounting Type
Surface Mount
Number Of Elements
1
Number of Inputs per Gate
2
Schmitt Trigger Input
No
Package Type
SC-74A
Pin Count
5
Logic Family
LVC
Input Type
TTL
Maximum Operating Supply Voltage
5.5 V
Maximum High Level Output Current
-32mA
Maximum Propagation Delay Time @ Maximum CL
7 ns @ 50 pF
Minimum Operating Supply Voltage
1.65 V
Maximum Low Level Output Current
32mA
Maximum Operating Temperature
+125 °C
Output Type
Single Ended
Length
3.1mm
Height
1mm
Width
1.7mm
Dimensions
3.1 x 1.7 x 1mm
Minimum Operating Temperature
-40 °C
Propagation Delay Test Condition
50pF
Product details
74LVC Family Logic Gates
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family
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2.750 OMR
0.028 OMR Each (In a Pack of 100) (ex VAT)
2.888 OMR
0.029 OMR Each (In a Pack of 100) (inc. VAT)
Standard
100
2.750 OMR
0.028 OMR Each (In a Pack of 100) (ex VAT)
2.888 OMR
0.029 OMR Each (In a Pack of 100) (inc. VAT)
Standard
100
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Please check again later.
| Quantity | Unit price | Per Pack |
|---|---|---|
| 100 - 200 | 0.028 OMR | 2.750 OMR |
| 300 - 500 | 0.016 OMR | 1.650 OMR |
| 600 - 1100 | 0.016 OMR | 1.650 OMR |
| 1200 - 2300 | 0.016 OMR | 1.650 OMR |
| 2400+ | 0.016 OMR | 1.650 OMR |
Ideate. Create. Collaborate
JOIN FOR FREE
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Technical Document
Specifications
Brand
NexperiaLogic Function
OR
Mounting Type
Surface Mount
Number Of Elements
1
Number of Inputs per Gate
2
Schmitt Trigger Input
No
Package Type
SC-74A
Pin Count
5
Logic Family
LVC
Input Type
TTL
Maximum Operating Supply Voltage
5.5 V
Maximum High Level Output Current
-32mA
Maximum Propagation Delay Time @ Maximum CL
7 ns @ 50 pF
Minimum Operating Supply Voltage
1.65 V
Maximum Low Level Output Current
32mA
Maximum Operating Temperature
+125 °C
Output Type
Single Ended
Length
3.1mm
Height
1mm
Width
1.7mm
Dimensions
3.1 x 1.7 x 1mm
Minimum Operating Temperature
-40 °C
Propagation Delay Test Condition
50pF
Product details
74LVC Family Logic Gates
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family
Ideate. Create. Collaborate
JOIN FOR FREE
No hidden fees!
- Download and use our DesignSpark software for your PCB and 3D Mechanical designs
- View and contribute website content and forums
- Download 3D Models, Schematics and Footprints from more than a million products